Improved Mitchell-Based Logarithmic Multiplier for Low-power DSP Applications

This paper presents a method to improve the accuracy of a logarithmic multiplier, based on Mitchell’s algorithms for calculating logarithms and antilogarithms. The method developed offers an area saving of approximately 50% and a power saving of 71% for larger input widths. A filter based on the multiplier is also presented. Introduction Multiplication in hardware has always been a cumbersome process and many of the solutions produced have large areas and consume a lot of power. An alternative method is to convert the numbers into logarithms. The main advantage of this is that the multiplication is replaced by an addition, which requires significantly less logic, however the logarithms and antilogarithms need to be calculated. There is a trade-off in that the calculated logarithms are approximations, which leads to errors in the answer. For Digital Signal Processing (DSP) this is less of a problem as systems can often deal with the extra noise introduced. This paper introduces a method of calculating logarithms and antilogarithms developed by Mitchell [1] in 1962, as well as various alternatives. The error generated by the Mitchell algorithms is analysed and is used to develop a method for improving the accuracy of the result. The area and power characteristics of the various multipliers are then given, which show that the Mitchell and Improved-Mitchell multipliers offer both area and power savings over the standard multiplier. The final section introduces a filter implemented using the Standard, Mitchell and Improved-Mitchell multipliers to show the benefits of using the multipliers in a real application. Multiplication Using Binary Logarithms The technique of multiplying two numbers using logarithms is a simple one. Take the logarithms of the two multiplicands, add the logarithms together and then take the antilogarithm of the resulting summation. The problem then becomes one of how to calculate the logarithms and antilogarithms. Although the main focus of this paper is on an improved Mitchell-based multiplier, various alternative approaches for calculating logarithms were investigated to provide a comparison to the Mitchell and ImprovedMitchell multipliers. These were; a pure Look-Up Table (LUT); a LUT plus an interpolator, and a non-linear LUT and interpolator. The pure LUT stores a (pre-calculated) value for the logarithm of every possible input value. The logarithm is obtained by looking for its value in the table. The LUT and Interpolator use a similar table to the LUT, but do not store every value. Instead it stores half, for example, and uses linear interpolation to estimate the values between the look-up points. The interpolator formula is       − − − + = a b a f b f a x a f x f ) ( ) ( ) ( ) ( ) ( (1) This formula still requires a multiplication. However, as it is working on numbers that have fewer bits than the full multiplication, the multiplier used here will be smaller in terms of area. For example, an 8-bit input logarithmic multiplier would us a 4-bit multiplier for the interpolation. The non-linear LUT and interpolator exploits the shape of the logarithm curve and store the logarithms for every power of 2 (i.e. 12, 102, 1002, ...). These values are used because the logarithms have no fractional component, which means that the value stored in the LUT is exact. Mitchell presented in his paper a method of calculating logarithms and antilogarithms which is summarised below: Let N be a binary number. To calculate the logarithms first locate the Most Significant Bit (MSB) which gives the characteristic of the logarithm. Mitchell indicates that this can be done using a shift and count approach; however this would require multiple clock cycles to achieve. An alternative, purely combinatorial, circuit was developed which allows the characteristic to be found in a single clock cycle. The remaining bits are then shifted down (below the binary point) to give the binary fraction and merged with the characteristic to give the approximation. As an example, take N=25, which has a binary representation of 110012. The MSB is bit 4, which gives a characteristic of 1002, and the remaining bits (10012) gives the binary fraction. This gives a value for the logarithm of 100.10012 (=4.562510). The correct value of log2(25) is 4.6439. A similar approach is used to calculate the antilogarithm. The characteristic of the logarithm is used to determine the MSB of the final result. The binary fraction is inserted to the right of the set bit. Take the example above, where the logarithm is 100.10012. This gives an MSB of 100002, and 0.10012 is left-shifted by 4 to give 1001.02. When these two values are OR’d the answer is 110012, which is the number N. Using the algorithms above, a circuit for calculating multiples was developed and is shown in Fig 1. The final block (“Check for Zero”) is required to ensure that the output is zero when either of the inputs are zero. Fig 1. Multiplier Block Diagram. Others [3,4] have used Mitchell’s algorithms to implement a multiplier similar to the one above, however they do not implement the error correction function. Improvements to the Mitchell-Based Multiplier Mitchell showed in his paper that the error in the product (using his method) is dependant only on the binary fraction components of the two multiplicands. The important points are repeated here. A binary number, N, can be written